AD5689BRUZ-RL7

AD5689 is a low power, dual channel, buffered voltage output digital-to-analogue converter (DAC). The devices include a gain select pin giving a full-scale output of 2.5V (gain = 1) or 5V (gain = 2). It operate from a single 2.7V to 5.5V supply, it is guaranteed monotonic by design, and exhibit less than 0.1% FSR gain error and 1.5mV offset error performance. It also incorporates a power-on reset circuit and a RSTSEL pin that ensure that the DAC outputs power up to zero scale or midscale and remain there until a valid write takes place. Each part contains a per channel power-down feature that reduces the current consumption of the device to 4µA at 3V while in power-down mode. Application includes optical transceivers, base station power amplifiers, process control (PLC I/O cards), industrial automation, data acquisition systems.

• Reset to zero scale or midscale (RSTSEL pin)
• 50MHz SPI with readback or daisy chain
• Typical relative accuracy is ±1LSB (gain = 2, VDD = 2.7V to 5.5V)
• Maximum differential nonlinearity is ±1LSB (guaranteed monotonic by design)
• 0.4mV typical zero-code error (all 0s loaded to DAC register)
• Typical offset error is +0.1mV (VDD = 2.7V to 5.5V, 1.62V ≤ VLOGIC ≤ 5.5V)
• Typical gain error is ±0.02% of FSR (VDD = 2.7V to 5.5V, 1.62V ≤ VLOGIC ≤ 5.5V)
• Typical total unadjusted error is ±0.01 (gain = 2, VDD = 2.7V to 5.5V, 1.62V ≤ VLOGIC ≤ 5.5V)
• Typical offset error drift is ±1µV/°C (VDD = 2.7V to 5.5V, 1.62V ≤ VLOGIC ≤ 5.5V)
• 16 lead TSSOP package, operating temperature range from -40°C to +105°C

Pastabos

ADI products are only authorized (and sold) for use by the customer and are not to be resold or otherwise passed on to any third party