74LVC1G126GV,125

74LVC1G126GV,125 is a single bus buffer/line driver with a 3-state output. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in mixed 3.3V and 5V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. It also features ESD protection (HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V, CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000V.

• Wide supply voltage range from 1.65V to 5.5V
• Overvoltage tolerant inputs to 5.5V, high noise immunity
• CMOS low power dissipation, IOFF circuitry provides partial power-down mode operation
• ±24mA output drive (VCC = 3V), latch-up performance exceeds 250mA
• Direct interface with TTL levels, input leakage current is ±0.1μA typical
• Supply current is 0.1μA typ at (VI = 5.5V or GND;VCC = 1.65V to 5.5V;IO = 0A,Tamb = -40°C to +85°C)
• Input capacitance is 5pF typical at (Tamb = -40°C to +85°C)
• Propagation delay is 3ns typical at (VCC = 1.65V to 1.95V, -40°C to +85°C)
• Operating temperature range from -40°C to +125°C
• 5-lead SC-74A package

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