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Kiekis | |
---|---|
2500+ | 0,132 € |
7500+ | 0,129 € |
Informacija apie produktą
Produktų apžvalga
The HEF4027BT is a dual JK Flip-flop features independent set-direct (SD), clear-direct (CD), clock inputs and outputs (Q, Q\). Data is accepted when clock is low and transferred to the output on the positive-going edge of the clock. The active high asynchronous clear-direct and set-direct inputs are independent and override the J, K and clock inputs. The outputs are buffered for best system performance. Schmitt trigger action makes the clock input highly tolerant of slower rise and fall times. It operates over a recommended VDD power supply range of 3 to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.
- Fully static operation
- Standardized symmetrical output characteristics
- Complies with JEDEC standard JESD 13-B
Pritaikymas
Medical, Industrial, Consumer Electronics, Automation & Process Control
Techniniai duomenys
HEF4027
30ns
2.4mA
SOIC
Positive Edge
4.5V
HEF4000
-40°C
-
MSL 1 - Unlimited
JK
30MHz
SOIC
16Pins
Complementary
15.5V
4027
70°C
-
No SVHC (21-Jan-2025)
Techniniai duomenys (4)
Teisinė ir aplinkosaugos informacija
Šalis, kurioje paskutinį kartą gamintojo atliktas stambus gamybos procesasKilmės šalis:United States
Šalis, kurioje paskutinį kartą gamintojo atliktas stambus gamybos procesas
„RoHS“
„RoHS“
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